1. Field of Endeavor
Embodiments relate to a semiconductor memory device, and more particularly, to a semiconductor memory device having a driver for compensating for a parasitic resistance of data input/output pads that share a supply voltage pad and a ground voltage pad.
2. Description of the Related Art
In a semiconductor memory device, a plurality of data input/output pads DQs are present at the end of a data path in which memory cell data is read or written. The data input/output pads DQs are connected to a driver for outputting the read memory cell data. The driver has a structure in which a pull-up transistor is connected between a supply voltage pad VDDQ and each of the data input/output pads DQ. Furthermore, a pull-down transistor is connected between a ground voltage pad VSSQ and each of the data input/output pads DQ. The pull-up transistor and the pull-down transistor are turned on or off according to internal data signals generated in relation to the read memory cell data.
In each of the data input/output pads DQ, the supply voltage pad VDDQ and the ground voltage pad VSSQ, that respectively apply a supply voltage and a ground voltage to the driver, are located at both sides of the data input/output pad DQ. That is, one supply voltage pad VDDQ and one ground voltage pad VSSQ are installed for each data input/output pad DQ.